The output voltage ripple

output voltage ripple

Универсальный англо-русский словарь . Академик.ру . 2011 .

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Output Voltage Ripple

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Power Management

Hank Zumbahlen , with the engineering staff of Analog Devices , in Linear Circuit Design Handbook , 2008

Switching Regulator Output Filtering

In order to minimize switching regulator output voltage ripple it is often necessary to add additional filtering. In many cases, this is more efficient than simply adding parallel capacitors to the main output capacitor to reduce ESR.

Output ripple current in a boost converter is pulsating, while that of a buck converter is a sawtooth. In any event, the high frequency components in the output ripple current can be removed with a small inductor (2–10 μH or so followed by a low ESR capacitor). Figure 9-61 shows a simple LC filter on the output of a switching regulator whose switching frequency is f. Generally the actual value of the filter capacitor is not as important as its ESR when filtering the switching frequency ripple. For instance, the reactance of a 100 μF capacitor at 100 kHz is approximately 0.016 Ω, which is much less than available ESRs.

Figure 9-61: . Switching regulator output filtering

The capacitor ESR and the inductor reactance attenuate the ripple voltage by a factor of approximately 2πfL/ESR. The example shown in Figure 9-61 uses a 10 μH inductor and a capacitor with an ESR of 0.2 Ω. This combination attenuates the output ripple by a factor of about 32.

The inductor core material is not critical, but it should be rated to handle the load current. Also, its DC resistance should be low enough so that the load current does not cause a significant voltage drop across it.

Step-down μModule regulator produces 15A output from inputs down to 1.5V—no bias supply required

Alan Chern , Jason Sekanina , in Analog Circuit Design, Volume Three , 2015

Input and output ripple

Output capacitors should have low ESR to meet output voltage ripple and transient requirements. A mixture of low ESR polymer and/or ceramic

capacitors is sufficient for producing low output ripple with minimal noise and spiking. Output capacitors are chosen to optimize transient load response and loop stability to meet the application load-step requirements by using the Excel-based LTpowerCAD design tool. (Table 5 of the LTM4611 data sheet provides guidance for applications with 7.5A load-steps and 1μs transition times.) For this design example, four 100μF ceramic capacitors are used. Figures 177.3 and 177.4 show input and output ripple at 15A load with 20MHz bandwidth-limit. View the associated videos to see the test methodology, as well as ripple waveforms without bandwidth limiting.

Figure 177.3 . 5V_IN to 1.5V_OUT at 15A Output Load

Figure 177.4 . 1.8V_IN to 1.5V_OUT at 15A Output Load

For this design, the choice of input capacitors is critical due to the low input voltage range. Long input traces can cause voltage drops, which could nuisance-trip the μModule regulator’s undervoltage lockout (UVLO) detection circuitry. Input ripple, typically a non-issue with higher input voltages, may fall a significant percentage below nominal—close to UVLO—at lower input voltages. In this case, input voltage ripple should be addressed since input filter oscillations can occur due to poor damping under heavy load current. This design uses a large 680μF POSCAP and two 47μF ceramic capacitors to compensate for meter-long input cables used during bench testing.

Electronic Power Conversion

18.7.1 Interleaved SMPS

There is a strong desire in SMPS design to reduce output voltage ripple and input current ripple (especially in mains connected equipment subject to EMC constraints). Figure 18.59 shows an example of parallel connected output stages with interleaved operation of the switches. It can be seen that the resultant current ripple is at twice the frequency of operation of the switches and that each switch has processed half of the current. Viewed in the frequency domain, we would see ripple current components at all of the even multiples of the switching frequency, whereas those at odd multiples created by one module will have been cancelled by those created (in anti-phase) by the other module. The same principle was used in the single-phase d.c./a.c. converter of Section 18.3.1 in which the two halves of the bridge were operated with phase-shifted carriers.

Figure 18.59 . A pair of interleaved Buck SMPS showing a reduction of amplitude and increase in the effective frequency of the current ripple

This idea can be extended to series connection of modules and to any number of modules. It can be applied to the input connection, output connection or both. In general, an n-module system has an effective switching rate (ripple frequency) of nf_s. In all cases it is important to match components and operating conditions in the modules in order to achieve the desired cancellation of ripple components.

LT1070 design manual

Carl Nelson , in Analog Circuit Design , 2011

Output capacitor

The main criteria for selecting C2 is low ESR (effective series resistance), to minimize output voltage ripple . A reasonable design procedure is to let the reactance of the output capacitor contribute no more than 1/3 of the total peak-to-peak output voltage ripple (V_P-P), yielding:

Using V_OUT = 12V, I_OUT = 1A, V_IN = 5V, f = 40kHz and V_P-P =200mV,

This leaves 67% of the ripple attributable to ESR, giving:

After C2 has been selected, output voltage ripple may be calculated from:

If lower output ripple is required, a larger output capacitor must be used with lower ESR. It is often necessary to use capacitor values much higher than calculated to obtain the required ESR. In the example shown, capacitors with guaranteed ESR less than 0.04Ω with a working voltage of 15V generally fall in the 1000μF to 2000μF range. Higher voltage units have lower capacitance for the same ESR.

A second option to reduce output ripple is to add a small LC output filter. If the LC product of the filter is much smaller than L1 • C2, it will not affect loop phase margin. Dramatic reduction in output ripple can be achieved with this filter, often at lower cost and less board space than simply increasing C2. See section on output filters for details.

Efficient dual polarity output converter fits into tight spaces

Introduction

This design note describes a compact and efficient ±5V output dual polarity converter that uses a single buck regulator. The topology shown features 3mm maximum circuit height, high efficiency and low output voltage ripple on a 5V output—important considerations for many battery-powered, handheld and noise-sensitive devices. This combination of features is not easily achievable with other commonly used dual polarity topologies. For instance, one alternative topology, a flyback converter using a boost regulator, is relatively inefficient, requires a bulky (5mm or taller) transformer and generates high output voltage ripple. Another alternative, using two buck regulators, incurs both the cost of the additional regulator and the cost of the PCB real estate it occupies.

The single buck regulator topology shown here requires few components. To reduce the maximum circuit height, it uses two power inductors instead of a transformer. In the absence of the transformer core, the coupling capacitor allows energy to pass between the positive and negative sides of the circuit while maintaining a voltage potential between the two inductors, indirectly regulating the negative output.

High efficiency, high density 3-phase supply delivers 60A with power saving Stage Shedding, active voltage positioning and nonlinear control for superior load step response

Jian Li , Kerry Holliday , in Analog Circuit Design, Volume Three , 2015

1.5V/60A, 3-phase power supply

Figure 38.1 shows a 7V to 14V input, 1.5V/60A output application. The LTC3829’s three channels run 120° out-of-phase, which reduces input RMS current ripple and output voltage ripple compared to single-channel solutions. Each phase uses one top MOSFET and two bottom MOSFETs to provide up to 20A of output current.

Figure 38.1 . A 1.5V/60A 3-Phase Converter Featuring the LTC3829

The LTC3829 includes unique features that maximize efficiency, including strong gate drivers, short dead times and a programmable Stage Shedding mode, where two of the three phases shut down at light load. Onset of Stage Shedding mode can be programmed from no load to 30% load. Figure 38.2 shows the efficiency of this regulator at over 86.5% with a 12V input and a 1.5V/60A output with Stage Shedding mode, dramatically increasing light load efficiency.

Figure 38.2 . Efficiency Comparison of Stage Shedding vs CCM

The current mode control architecture of the LTC3829 ensures that DC load current is evenly distributed among the three channels, as shown in Figure 38.3 . Dynamic, cycle-by-cycle current sharing performance is similarly tight in the face of load transients.

Figure 38.3 . Current Sharing Performance between Phases

A fast and controlled transient response is another important requirement for modern power supplies. The LTC3829 includes two features that reduce the peak-to-peak output voltage excursion during a load step: programmable nonlinear control or programmable active voltage positioning (AVP). Figure 38.4 shows the transient response without these features enabled. Figure 38.5 shows that nonlinear control improves peak-to-peak response by 17%. Figure 38.6 shows that AVP can achieve a 50% reduction in the amplitude of voltage spikes.

Figure 38.4 . Transient Performance without AVP and Nonlinear Control

Figure 38.5 . Transient Performance with Nonlinear Control

Figure 38.6 . Transient Performance with AVP

Tiny versatile buck regulators operate from 3.6V to 36V input

LT1936 produces 3.3V at 1.2A from 4.5V to 36V

Figure 61.1 shows a typical application for the LT1936. This circuit generates 3.3V at 1.2A from an input of 4.5V to 36V. With the same input voltage range, the LT1933 circuit can supply 500mA. The typical output voltage ripple of the Figure 61.1 circuit is less than 16mV while efficiency is as high as 89%. Excellent transient response is possible with either external compensation or the internal compensation; this circuit uses internal compensation to minimize component count. A high ESR electrolytic capacitor, C6 in Figure 61.1 , is recommended to damp overshoot voltage in applications where the circuit is plugged into a live input source through long leads. For more information, refer to the LT1933 or LT1936 data sheet.

Figure 61.1 . Typical Application of LT1936 Accepts 4.5V to 36V and Produces 3.3V/1.2A

36V 2A buck regulator integrates power Schottky

Low ripple and high efficiency solution over a wide load range

The LT3681 switching frequency can be programmed from 300kHz to 2.8MHz by using a resistor tied from the RT pin to ground. The LT3681 offers low ripple Burst Mode operation that maintains high efficiency at light loads while keeping the no load output voltage ripple below 15mV _P–P.

During Burst Mode operation, the LT3681 is able to deliver current in as little as one cycle to the output capacitor followed by sleep periods where all of the output power is delivered to the load by the output capacitor. Between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to only 55μA. As the load current decreases toward no load, the percentage of time that the LT3681 operates in sleep mode increases and the average input current is greatly reduced, so high efficiency is maintained.

Figure 52.3 shows the low ripple and single cycle burst inductor current at no load for the 3.3V regulator shown in Figures 52.1 and 52.2 . The LT3681 has a very low shutdown current (less than 1μA), significantly extending battery life in applications that spend long periods in sleep or shutdown mode.

Figure 52.3 . This LT3681 Design Has Only 15mV of Output Ripple, Even at No Load Under Burst Mode Operation

For systems that rely on a well-regulated power source, the LT3681 provides a power good flag that signals when V_OUT reaches 90% of the programmed output voltage.

A resistor and capacitor on the RUN/SS pin programs the LT3681’s soft-start, reducing the inrush current during start-up. In applications where the circuit is plugged into a live input source through long leads, an electrolytic input capacitor, which has higher ESR than a ceramic capacitor, is recommended to dampen the overshoot voltage. Refer to Application Note 88 for further details.

Power

7.2 Power Supply Specifications

The most basic specification of a DC power supply is its output voltage and maximum output current. The maximum output current is typically specified relative to a load impedance. Many power supplies provide several different output voltages all derived from a common core.

Output voltage ripple is a very important specification for digital and particularly for analog circuits. Ripple does not have to be periodic; in this case, it refers to any variation in the output voltage. While digital circuits tend to be relatively insensitive to power supply voltage, large amounts of ripple may cause errors. Analog circuits are particularly sensitive to power supply ripple. Since output voltages are produced relative to the power supply, variations in the power supply result in variations in those outputs.

Conversion efficiency measures the ratio of power delivered to the load to the total power consumed by the power supply. As shown in Fig. 7.1 , efficiency varies with the power delivered to the load. Most power supplies are less efficient at low loads—the overhead power consumption of the supply generally does not scale well with load power.

Fig. 7.1 . Power supply conversion efficiency versus power delivered to the load.

Heat dissipation is an important metric that may determine the case used for the system or whether it needs some form of active cooling such as a fan. Power supplies do not always directly specify their heat output. However, we do know that for a given power output, more efficient power supplies will produce less heat.

The ground voltage is often used as a reference voltage throughout the circuit. The term ground is not chosen arbitrarily. A true earthed ground is directly connected to the Earth through a low-resistance connection. The voltage of the Earth is very difficult to change—Gauss’s Law tells us that any charge sent to the earthed ground will be equally distributed across the surface of the Earth. Since a great deal of charge is required to noticeably change the voltage of the Earth, it provides a very good reference voltage.

Power supplies for mixed-signal systems generally provide a separate analog ground that is distinct from the digital ground. Digital signals can generate large swings that produce variations from the nominal ground voltage. Since analog signals are particularly sensitive to power supply noise, we want to isolate the analog circuits from noise created by the digital circuits.

Safety is a critical requirement for power supplies. Shocks from AC utility lines can be fatal. Improper design of power supplies can lead to fires. Even low voltages can damage other devices. We must carefully design power supplies to minimize their risk of dangerous operation and failure.

Batteries require some specialized specifications; we will defer their discussion to Section 7.5 .

Ultralow power boost converters require only 8.5μA of standby quiescent current

Application example

Figure 115.1 details the LT8410 boost converter generating a 16V output from a 2.5V-to-16V input source. The LT8410/-1 controls power delivery by varying both the peak inductor current and switch off time. This control scheme results in low output voltage ripple as well as high efficiency over a wide load range. Figures 115.2 and 115.3 show efficiency and output peak-to-peak ripple for Figure 115.1 ’s circuit. Output ripple voltage is less than 10mV despite the circuit’s small (0.1μF) output capacitor.

Figure 115.1 . 2.5V–16V to 16V Boost Converter

Figure 115.2 . Efficiency vs Load Current for Figure 115.1 Converter

Figure 115.3 . Output Peak-to-Peak Ripple vs Load Current for Figure 115.1 Converter at 3.6V

The soft-start feature is implemented by connecting an external capacitor to the V_REF pin. If soft-start is not needed, the capacitor can be removed. Output voltage is set by a resistor divider from the V_REF pin to ground with the center tap connected to the FBP pin, as shown in Figure 115.1 . The FBP pin can also be biased directly by an external reference.

The SHDN ‾ pin of the LT8410/-1 can serve as an on/off switch or as an undervoltage lockout via a simple resistor divider from V_CC to ground.

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